Designed a custom hardware kernel on Kria KV260's FPGA fabric accelerating the convolution operation over CKKS homomorphically encrypted data for secure inference.

Developed Poly-GRACE, a polynomial-friendly self-supervised learning framework for graphs, achieving Homomorphic Encryption compatibility and enabling privacy-preserving representation learning without significant performance compromise.

Complete C++ library implementing the BFV homomorphic encryption scheme from scratch, including polynomial arithmetic using NTT, key generation, and homomorphic operations.

Production-ready password manager written in Rust featuring AES-256-GCM encryption, Argon2id key derivation, secure memory management, rate limiting, and comprehensive input validation. Built for personal use with enterprise-grade security.

Clean-slate 32-bit RISC-V CPU core using SystemVerilog, featuring custom ISA subset, ALU, register file, memory controller, and pipelined execution. Built with simulation-first methodology.

Designed and fabricated custom PCB to convert DC to 3-phase AC for PMSM used in Formula SAE electric car. Included power handling circuitry, safety features, and EMI optimization.

Course project for EEE-103 (Measurements and Transducers) involving development of computer vision-based control system for a 5-DOF robotic arm using stereovision for real-time object detection and tracking. Implemented inverse kinematics algorithms to enable precise end-effector positioning based on visual feedback from dual camera setup.

Our team (Aurva) was announced as global winners in the AMD Open Hardware 2025's Adaptive Computation Track for our work on accelerated convolution operation over CKKS Encryption.

Supervisor: Dr. Tharun Kumar Reddy Bollu

Solo member team (FossilizedPluto) achieved second position in CSAW Embedded Security Challenge 2025, attacking and mitigating firmware vulnerable to Side-Channel and Fault-Injection Attacks using the ChipWhisperer Nano board.

Supervisor: Dr. Sparsh Mittal